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Espressif Systems /ESP32-P4 /JPEG /DECODE_CONF

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Interpret as DECODE_CONF

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RESTART_INTERVAL0COMPONENT_NUM0 (SW_DHT_EN)SW_DHT_EN 0SOS_CHECK_BYTE_NUM 0RST_CHECK_BYTE_NUM 0 (MULTI_SCAN_ERR_CHECK)MULTI_SCAN_ERR_CHECK 0 (DEZIGZAG_READY_CTL)DEZIGZAG_READY_CTL

Description

Control and configuration registers

Fields

RESTART_INTERVAL

configure restart interval in DRI marker when decode
COMPONENT_NUM

configure number of components in frame when decode
SW_DHT_EN

software decode dht table enable
SOS_CHECK_BYTE_NUM

Configure the byte number to check next sos marker in the multi-scan picture after one scan is decoded down. The real check number is reg_sos_check_byte_num+1
RST_CHECK_BYTE_NUM

Configure the byte number to check next rst marker after one rst interval is decoded down. The real check number is reg_rst_check_byte_num+1
MULTI_SCAN_ERR_CHECK

reserved for decoder
DEZIGZAG_READY_CTL

reserved for decoder

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/espressif/svd